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1/15 november 2000 M27C320 32 mbit (4mb x8 or 2mb x16) otp eprom n 5v 10% supply voltage in read operation n access time: 80ns n byte-wide or word-wide configurable n 32 mbit mask rom replacement n low power consumption C active current 70ma at 8mhz C stand-by current 100ma n programming voltage: 12v 0.25v n programming time: 50s/word n electronic signature: C manufacturer code 20h C device code: 32h description the M27C320 is a 32 mbit eprom offered in the otp range (one time programmable). it is ideally suited for microprocessor systems requiring large data or program storage. it is organised as either 4 mwords of 8 bit or 2 mwords of 16 bit. the pin- out is compatible with the 32 mbit mask rom. the M27C320 is offered in so44 and tsop48 (12 x 20 mm) packages. 44 1 so44 (m) tsop48 (n) 12 x 20 mm figure 1. logic diagram ai02152 21 a0-a20 gv pp q0-q14 v cc M27C320 byte e v ss 15 q15aC1
M27C320 2/15 figure 2b. tsop connections ai02154 M27C320 12 1 13 24 25 36 37 48 gv pp q0 q8 a3 a0 e v ss a2 a1 a13 v ss a14 a15 q7 a12 a16 byte q15aC1 q5 q2 q3 v cc q11 q4 q14 a9 a19 a18 a4 a20 a7 q1 q9 a6 a5 q6 q13 a11 a10 q10 q12 a17 a8 v ss v cc v ss v ss v ss figure 2a. so connections gv pp q0 q8 a3 a0 e v ss a2 a1 a13 v ss a14 a15 q7 a12 a16 byte q15aC1 q5 q2 q3 v cc q11 q4 q14 a9 a19 a18 a4 nc a20 a7 ai02153 M27C320 8 2 3 4 5 6 7 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 20 19 18 17 q1 q9 a6 a5 q6 q13 44 39 38 37 36 35 34 33 a11 a10 q10 21 q12 40 43 1 42 41 a17 a8 table 1. signal names a0-a20 address inputs q0-q7 data outputs q8-q14 data outputs q15aC1 data output / address input e chip enable g v pp output enable / program supply byte byte-wide select v cc supply voltage v ss ground nc not connected internally device operation the operating modes of the M27C320 are listed in the operating modes table. a single power supply is required in the read mode. all inputs are ttl compatible except for v pp and 12v on a9 for the electronic signature. read mode the M27C320 has two organisations, word-wide and byte-wide. the organisation is selected by the signal level on the byte pin. when byte is at v ih the word-wide organisation is selected and the q15aC1 pin is used for q15 data output. when the byte pin is at v il the byte-wide organisation is selected and the q15aC1 pin is used for the ad- dress input aC1. when the memory is logically re- garded as 16 bit wide, but read in the byte-wide organisation, then with aC1 at v il the lower 8 bits of the 16 bit data are selected and with aC1 at v ih the upper 8 bits of the 16 bit data are selected.
3/15 M27C320 table 2. absolute maximum ratings (1) note: 1. except for the rating "operating temperature range", stresses above those listed in the table "absolute maximum ratings" may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other condition s above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating condi - tions for extended periods may affect device reliability. refer also to the stmicroelectronics sure program and other relevant qual- ity documents. 2. minimum dc voltage on input or output is C0.5v with possible undershoot to C2.0v for a period less than 20ns. maximum dc voltage on output is v cc +0.5v with possible overshoot to v cc +2v for a period less than 20ns. 3. depends on range. table 3. operating modes note: x = v ih or v il , v id = 12v 0.5v. table 4. electronic signature note: outputs q15-q8 are set to '0'. symbol parameter value unit t a ambient operating temperature (3) C40 to 125 c t bias temperature under bias C50 to 125 c t stg storage temperature C65 to 150 c v io (2) input or output voltage (except a9) C2 to 7 v v cc supply voltage C2 to 7 v v a9 (2) a9 voltage C2 to 13.5 v v pp program supply voltage C2 to 14 v mode e g v pp byte a9 q15aC1 q14-q8 q7-q0 read word-wide v il v il v ih x data out data out data out read byte-wide upper v il v il v il x v ih hi-z data out read byte-wide lower v il v il v il x v il hi-z data out output disable v il v ih x x hi-z hi-z hi-z program v il pulse v pp v ih x data in data in data in program inhibit v ih v pp v ih x hi-z hi-z hi-z standby v ih x x x hi-z hi-z hi-z electronic signature v il v il v ih v id code codes codes identifier a0 q7 q6 q5 q4 q3 q2 q1 q0 hex data manufacturers code v il 00100000 20h device code v ih 00110010 32h
M27C320 4/15 the M27C320 has two control functions, both of which must be logically active in order to obtain data at the outputs. in addition the word-wide or byte-wide organisation must be selected. chip enable (e ) is the power control and should be used for device selection. output enable (g ) is the output control and should be used to gate data to the output pins independent of device selection. assuming that the addresses are stable, the ad- dress access time (t avqv ) is equal to the delay from e to output (t elqv ). data is available at the output after a delay of t glqv from the falling edge of g , assuming that e has been low and the ad- dresses have been stable for at least t avqv -t glqv . standby mode the M27C320 has standby mode which reduces the supply current from 50ma to 100a. the M27C320 is placed in the standby mode by apply- ing a cmos high signal to the e input. when in the standby mode, the outputs are in a high imped- ance state, independent of the g input. table 5. ac measurement conditions high speed standard input rise and fall times 10ns 20ns input pulse voltages 0 to 3v 0.4v to 2.4v input and output timing ref. voltages 1.5v 0.8v and 2v figure 3. ac testing input output waveform ai01822 3v high speed 0v 1.5v 2.4v standard 0.4v 2.0v 0.8v figure 4. ac testing load circuit ai01823b 1.3v out c l c l = 30pf for high speed c l = 100pf for standard c l includes jig capacitance 3.3k w 1n914 device under test table 6. capacitance (1) (t a = 25 c, f = 1 mhz) note: 1. sampled only, not 100% tested. symbol parameter test condition min max unit c in input capacitance v in = 0v 10 pf c out output capacitance v out = 0v 12 pf
5/15 M27C320 table 7. read mode dc characteristics (1) (t a = 0 to 70 c, C40 to 85 c or C40 to 125 c; v cc = 5v 10%) note: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp . 2. maximum dc voltage on output is v cc +0.5v. symbol parameter test condition min max unit i li input leakage current 0v v in v cc 1 a i lo output leakage current 0v v out v cc 10 a i cc supply current e = v il , g = v il , i out = 0ma, f = 8mhz 70 ma e = v il , g = v il , i out = 0ma, f = 5mhz 50 ma i cc 1 supply current (standby) ttl e = v ih 1ma i cc 2 supply current (standby) cmos e > v cc C 0.2v 100 a i pp program current v pp = v cc 10 a v il input low voltage C0.3 0.8 v v ih (2) input high voltage 2 v cc + 1 v v ol output low voltage i ol = 2.1ma 0.4 v v oh output high voltage ttl i oh = C400a 2.4 v two line output control because eproms are usually used in larger memory arrays, this product features a 2 line con- trol function which accommodates the use of mul- tiple memory connection. the two line control function allows: a. the lowest possible memory power dissipation, b. complete assurance that output bus contention will not occur. for the most efficient use of these two control lines, e should be decoded and used as the prima- ry device selecting function, while g should be made a common connection to all devices in the array and connected to the read line from the system control bus. this ensures that all deselect- ed memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device. system considerations the power switching characteristics of advanced cmos eproms require careful decoupling of the supplies to the devices. the supply current i cc has three segments of importance to the system designer: the standby current, the active current and the transient peaks that are produced by the falling and rising edges of e . the magnitude of the transient current peaks is dependent on the capacitive and inductive loading of the device outputs. the associated transient voltage peaks can be suppressed by complying with the two line output control and by properly se- lected decoupling capacitors. it is recommended that a 0.1f ceramic capacitor is used on every device between v cc and v ss . this should be a high frequency type of low inherent inductance and should be placed as close as possible to the device. in addition, a 4.7f electrolytic capacitor should be used between v cc and v ss for every eight devices. this capacitor should be mounted near the power supply connection point. the pur- pose of this capacitor is to overcome the voltage drop caused by the inductive effects of pcb trac- es.
M27C320 6/15 figure 5. word-wide read mode ac waveforms note: byte = v ih . ai02207 taxqx tehqz a0-a20 e gv pp q0-q15 tavqv tghqz tglqv telqv valid hi-z valid table 8. read mode ac characteristics (1) (t a = 0 to 70 c, C40 to 85 c or C40 to 125 c; v cc = 5v 10%) note: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp. 2. sampled only, not 100% tested. 3. speed obtained with high speed ac measurement conditions. symbol alt parameter test condition M27C320 unit -80 (3) -100 -120 min max min max min max t avqv t acc address valid to output valid e = v il , g = v il 80 100 120 ns t bhqv t st byte high to output valid e = v il , g = v il 80 100 120 ns t elqv t ce chip enable low to output valid g = v il 80 100 120 ns t glqv t oe output enable low to output valid e = v il 40 50 60 ns t blqz (2) t std byte low to output hi-z e = v il , g = v il 40 40 50 ns t ehqz (2) t df chip enable high to output hi-z g = v il 040040050ns t ghqz (2) t df output enable high to output hi-z e = v il 040040050ns t axqx t oh address transition to output transition e = v il , g = v il 555ns t blqx t oh byte low to output transition e = v il , g = v il 555ns
7/15 M27C320 figure 6. byte-wide read mode ac waveforms note: byte = v il . figure 7. byte transition ac waveforms note: e = v il ; g v pp = v il . ai02218 taxqx tehqz a0-a20 e gv pp q0-q7 tavqv tghqz tglqv telqv valid hi-z valid ai02219 taxqx tbhqv a0-a20 byte tavqv tblqx tblqz valid hi-z aC1 data out data out valid q0-q7 q8-q15
M27C320 8/15 table 9. programming mode dc characteristics (1) (t a = 25 c; v cc = 6.25v 0.25v; v pp = 12v 0.25v) note: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp . table 10. margin mode ac characteristics (1) (t a = 25 c; v cc = 6.25v 0.25v; v pp = 12v 0.25v) note: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp . symbol parameter test condition min max unit i li input leakage current v il v in v ih 10 m a i cc supply current 50 ma i pp program current e = v il 50 ma v il input low voltage C0.3 0.8 v v ih input high voltage 2.4 v cc + 0.5 v v ol output low voltage i ol = 2.1ma 0.4 v v oh output high voltage ttl i oh = C2.5ma 3.5 v v id a9 voltage 11.5 12.5 v symbol alt parameter test condition min max unit t a9hvph t as9 v a9 high to v pp high 2s t vphel t vps v pp high to chip enable low 2s t a10heh t as10 v a10 high to chip enable high (set) 1s t a10leh t as10 v a10 low to chip enable high (reset) 1s t exa10x t ah10 chip enable transition to v a10 transition 1s t exvpx t vph chip enable transition to v pp transition 2s t vpxa9x t ah9 v pp transition to v a9 transition 2s programming when delivered, all bits of the M27C320 are in the '1' state. data is introduced by selectively pro- gramming '0's into the desired bit locations. al- though only '0's will be programmed, both '1's and '0's can be present in the data word. the M27C320 is in the programming mode when v pp input is at 12.5v, g is at v ih and e is pulsed to v il . the data to be programmed is applied to 16 bits in parallel to the data output pins. the levels required for the address and data inputs are ttl. v cc is specified to be 6.25v 0.25v.
9/15 M27C320 table 11. programming mode ac characteristics (1) (t a = 25 c; v cc = 6.25v 0.25v; v pp = 12v 0.25v) note: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp . 2. sampled only, not 100% tested. symbol alt parameter test condition min max unit t av el t as address valid to chip enable low 1 s t qvel t ds input valid to chip enable low 1 s t vchel t vcs v cc high to chip enable low 2s t vphel t oes v pp high to chip enable low 1s t vplvph t prt v pp rise time 50 ns t eleh t pw chip enable program pulse width (initial) 45 55 s t ehqx t dh chip enable high to input transition 2 s t ehvpx t oeh chip enable high to v pp transition 2s t vplel t vr v pp low to chip enable low 1s t elqv t dv chip enable low to output valid 1 s t ehqz (2) t dfp chip enable high to output hi-z 0 130 ns t ehax t ah chip enable high to address transition 0 ns figure 8. margin mode ac waveforms note: a8 high level = 5v; a9 high level = 12v. ai00736b ta9hvph tvpxa9x a8 e gv pp a10 set v cc tvphel ta10leh texvpx ta10heh a9 a10 reset texa10x
M27C320 10/15 presto iii programming algorithm the presto iii programming algorithm allows the whole array to be programed with a guaran- teed margin in a typical time of 100 seconds. pro- gramming with presto iii consists of applying a sequence of 50s program pulses to each word until a correct verify occurs (see figure 10). during programing and verify operation a margin mode circuit must be activated to guarantee that each cell is programed with enough margin. no overprogram pulse is applied since the verify in margin mode provides the necessary margin to each programmed cell. program inhibit programming of multiple M27C320s in parallel with different data is also easily accomplished. ex- cept for e , all like inputs including g of the parallel M27C320 may be common. a ttl low level pulse applied to a M27C320's e input and v pp at 12v, will program that M27C320. a high level e input in- hibits the other M27C320s from being pro- grammed. program verify a verify (read) should be performed on the pro- grammed bits to determine that they were correct- ly programmed. the verify is accomplished with g at v il . data should be verified with t elqv after the falling edge of e . figure 9. programming and verify modes ac waveforms note: byte = v ih ; g v pp high level = 12v. tavel valid ai02205 a0-a20 q0-q15 v cc data in data out e tqvel tvchel tvphel tehqx tehvpx telqv teleh tehqz tvplel program verify gv pp tehax figure 10. programming flowchart ai02220 n = 0 last addr verify e = 50 m s pulse ++n = 25 ++ addr v cc = 6.25v, v pp = 12v fail check all words byte = v ih 1st: v cc = 6v 2nd: v cc = 4.2v yes no yes no yes no set margin mode reset margin mode
11/15 M27C320 electronic signature the electronic signature (es) mode allows the reading out of a binary code from an eprom that will identify its manufacturer and type. this mode is intended for use by programming equipment to automatically match the device to be programmed with its corresponding programming algorithm. the es mode is functional in the 25c 5c am- bient temperature range that is required when pro- gramming the M27C320. to activate the es mode, the programming equipment must force 11.5v to 12.5v on address line a9 of the M27C320, with v pp = v cc = 5v. two identifier bytes may then be sequenced from the device out- puts by toggling address line a0 from v il to v ih . all other address lines must be held at v il during electronic signature mode. byte 0 (a0 = v il ) represents the manufacturer code and byte 1 (a0 = v ih ) the device identifier code. for the stmicroelectronics M27C320, these two identifier bytes are given in table 4 and can be read-out on outputs q7 to q0.
M27C320 12/15 table 12. ordering information scheme note: 1. high speed, see ac characteristics section for further information. for a list of available options (speed, package, etc...) or for further information on any aspect of this de- vice, please contact the stmicroelectronics sales office nearest to you. example: M27C320 -80 m 1 device type m27 supply voltage c = 5v 10% device function 320 = 32 mbit (4mb x 8 or 2mb x 16) speed -80 (1) = 80 ns -100 = 100 ns -120 = 120 ns package m = so44 n = tsop48: 12 x 20 mm temperature range 1 = 0 to 70 c 6 = C40 to 85 c 3 = C40 to 125 c table 13. revision history date revision details september 1998 first issue 09/20/00 an620 reference removed 11/29/00 from preliminary data to data sheet C40 to 85 c and C40 to 125 c temperature ranges added (tables 7, 8 and 12) 80ns speed class in high speed ac measurement conditions (tables 8 and 12) note changed (figures 6 and 9) programming flowchart change (figure 10) presto iii programming algorithm paragraph changed
13/15 M27C320 table 14. so44 - 44 lead plastic small outline, 525 mils body width, package mechanical data symb mm inches typ min max typ min max a 2.42 2.62 0.095 0.103 a1 0.22 0.23 0.009 0.010 a2 2.25 2.35 0.089 0.093 b 0.50 0.020 c 0.10 0.25 0.004 0.010 d 28.10 28.30 1.106 1.114 e 13.20 13.40 0.520 0.528 e 1.27 C C 0.050 C C h 15.90 16.10 0.626 0.634 l 0.80 C C 0.031 C C a 3 C C 3 C C n44 44 cp 0.10 0.004 figure 11. so44 - 44 lead plastic small outline, 525 mils body width, package outline drawing is not to scale. so-b e n cp b e a2 d c l a1 a h a 1
M27C320 14/15 figure 12. tsop48 - 48 lead plastic thin small outline, 12 x 20 mm, package outline drawing is not to scale. tsop-a d1 e 1 n cp b e a2 a n/2 d die c l a1 a table 15. tsop48 - 48 lead plastic thin small outline, 12 x 20 mm, package mechanical data symb mm inches typ min max typ min max a 1.20 0.047 a1 0.05 0.15 0.002 0.006 a2 0.95 1.05 0.037 0.041 b 0.17 0.27 0.007 0.011 c 0.10 0.21 0.004 0.008 d 19.80 20.20 0.780 0.795 d1 18.30 18.50 0.720 0.728 e 11.90 12.10 0.469 0.476 e 0.50 - - 0.020 - - l 0.50 0.70 0.020 0.028 a 0 5 0 5 n48 48 cp 0.10 0.004
15/15 M27C320 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is registered trademark of stmicroelectronics all other names are the property of their respective owners ? 2000 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a. www.st.com

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